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| U4082B Low-Voltage Voice-Switched IC for Hands-Free Operation Description The low-voltage voice-switched speakerphone circuit, U4082B, incorporates the wide range of functions listed below. Versatility of the device is further enhanced by giving access to internal circuit points. The block diagram (figure 1) shows amplifiers, level detectors, transmit and receive attenuators operating in complementary functions, background noise monitors, chip disable, dial tone detector and mute function. Due to low-voltage operation, it can be operated either by a low supply or via a telephone line requiring 5.5 mA typically. Also featured is stand-alone operation through a coupling transformer (Tip and Ring) or in conjunction with a handset speech network, as shown in figure 2 Features D Low-voltage operation: 3 to 6.5 V D Attenuator gain range between transmit and receive: 52 dB D Four point signal sensing for improved sensitivity D Monitoring system for background-noise level D Microphone amplifier gain adjustable D Mute function MIC 11 MICO 10 17 TLI2 - + 9 TI D D D D Chip disable for active/standby operation On-board filter Dial tone detector Compatible with U4083B speaker amplifier Benefits D Fast channel switching allows quasi duplex operation D Proper operation in noisy surrounding 8 TO 7 HTI - + VB VB Background noise monitor 6 HTO- T-attenuator VS AGC 12 MUTE 16 CPT 18 TLO2 19 RLO2 4 VS 28 GND 3 CD VB - + 5 HTO+ 27 CPR 23 TLI1 25 RLO1 24 TLO1 Background noise monitor Level detectors Attenuator control Dial tone detector + - Level detectors U 4082 B V B 400 W R-attenuator Filter +1 2 FI 15 VB 14 CT 20 RLI2 RECO 22 21 RI 13 VCI 26 RLI1 1 PD 93 7766 e Figure 1. Block diagram Ordering Information Extended Type Number U4082B-A U4082B-AFL Package DIP28 SO28 Remarks Rev. A1, 29-Apr-98 1 (22) U4082B 2 (22) 0.02 mF 0 .2 mF 620 W V B 20 5.1 k W 270 pF 180 k W MIC 1 1 0.1 mF 0.1 mF 5.1 k W TI 9 1 0 kW 0.1 mF 51 k W Balancing network 820 W 300 W 0.05 mF 0.01 mF Hook switch Tip MICO 1 0 1 7 TLI2 TO 8 HTI 7 HTO - 6 mF - + 12 MUTE 0.1 mF 5.1 k W - + 5 H TO + 27 47 1kW T- attenuator V S V B - + Ring VB Background noise monitor VB Background noise monitor CP R 23 TLI1 mF 100 k W 16 C PT AGC 100 k W VS 47 mF mF mF 18 TLO 2 19 Figure 2. Block diagram with external circuit 2 Level detector Attenuator control Dial tone detector Level detector 2 25 RLO 1 mF 2 RLO 2 4 + - 24 TLO 1 2 mF VS 1000 mF VS U4082B 28 GND VB 400 4700 pF 5.1 V 3 CD W Filter R- attenuator +1 2 FI 220 k W 4700 pF 1N4733 V B 22 0 mF 6 1 3 + - 15 12 0 k W 14 C T 5 mF RLI2 2 0 0.05 mF 5.1 k W RECO 2 2 RI 2 1 VCI 1 3 RLI1 2 6 FO 1 0.1 mF 10 kW 10 k W 0.1 mF 0.05 mF 56 k W VB 110 k W 8 200 pF V B 20 k W U4083B + - 7 4 5 Rev. A1, 29-Apr-98 Volume control 9.1 k W 937734 e U4082B Pin Description FO FI CD VS HTO+ HTO- HTI TO TI MICO MIC 1 2 3 4 5 6 7 8 9 10 11 28 GND Pin 9 Symbol TI 10 27 CPR 26 RLI1 25 RLO1 24 TLO1 23 TLI1 22 RECO MICO MIC MUTE 11 12 13 21 RI 20 RLI2 19 VCI RLO2 18 TLO2 17 TLI2 16 14 CT MUTE 12 VCI CT 13 14 CPT 15 VB 15 VB 16 CPT Pin 1 2 3 Symbol FO FI CD 4 VS 5 HTO+ 6 HTO- 7 HTI 8 TO Function Filter output. Output impedance is less than 50 W. Filter input. Input impedance is greater than 1 MW. Chip disable. A logic low (< 0.8 V) sets normal operation. A logic high (> 2 V) disables the IC to conserve power. Input impedance is nominally 90 kW. Supply voltage 2.8 to 6.5 V, approximately 5 mA. AGC circuit reduces the receive attenuator gain @ 25 dB Receive mode at 2.8 V. Output of the second hybrid amplifier. Hybrid output. Gain is internally set at - 1 to provide a differential output, (in conjunction with HTO-) to the hybrid transformer. Output of the first hybrid amplifier. Hybrid output. Gain is set by external resistors. Input and summing node for the first hybrid amplifier. DC level is approximately VB. Transmit attenuator output. DC level is approximately VB. 17 18 TLI2 TLO2 19 20 21 RLO2 RLI2 RI * 22 23 24 25 RECO TLI1 TLO1 RLO1 * 26 27 RLI1 CPR 28 GND Function Transmit attenuator input. Maximum signal level is 350 mVrms. Input impedance is approximately 10 kW Microphone amplifier output. Gain is set by external resistors. Microphone amplifier input. Bias voltage is approximately VB. Mute input. A logic low ( < 0.8 V ) sets normal operation. A logic high ( > 2 V ) mutes the microphone amplifier without affecting the rest of the circuit. Input impedance is nominally 90 kW. Volume control input. When VCI = VB, the receive attenuator is at maximum gain when in receive mode. When VCI = 0.3 VB, the receive gain is down 35 dB. It does not affect the transmit mode. Response time. An RC at this pin sets the response time for the circuit to switch modes. Output voltage VS/2. It is a system ac ground and biases the volume control. A filter cap is required. An RC at this pin sets the time constant for the transmit background monitor. Transmit level detector input on the microphone/speaker side. Transmit level detector output on the microphone/speaker side, and input to the transmit background monitor. Receive level detector output on the microphone/speaker side. Receive level detector input on the microphone/speaker side. Input receive attenuator and dial tone detector. Maximum input level is 350 mVrms. Input impedance is approximately 10 kW. Receive attenuator output. DC level is approximately VB. Transmit level detector input on the line side. Transmit level detector output on the line side. Receive level detector output on the line side and input to the receive background monitor. Receive level detector input on the line side. An RC at this pin sets the time constant for the receive background monitor. Ground [ Rev. A1, 29-Apr-98 3 (22) U4082B Introduction General The fundamental difference between the operation of a speakerphone and a handset is that of half-duplex versus full duplex. The handset is full duplex since conversation can occur in both directions (transmit and receive) simultaneously. A speakerphone has higher gain levels in both paths, and attempting to converse full duplex results in oscillatory problems due to the loop that exists within the system. The loop is formed by the receive and transmit paths, the hybrid and the acoustic coupling (speaker to microphone). The only practical and economical solution used to date is to design the speakerphone to function in a half duplex mode. That is, only one person speaks at a time, while the other listens. To achieve this, a circuit is required which can detect who is talking, switch on the appropriate path (transmit or receive), and switch off (attenuate) the other path. In this way, the loop gain is maintained less than unity. When the talkers exchange function, the circuit must quickly detect this, and switch the circuit appropriately. By providing speech level detectors, the circuit operates in a "hands-free" mode, eliminating the need for a "push-to-talk" switch. The handset has the same loop as the speakerphone. Oscillations don't occur because the gains are considerably lower and the coupling from the earpiece to the mouthpiece is almost nonexistent (the receiver is normally held against a person's ear). The U4082B provides the necessary level detectors, attenuators, and switching control for a properly operating speakerphone. The detection sensitivity and timing are externally controllable. Additionally, the U4082B provides background noise monitors (which make the circuit insensitive to room and line noise), hybrid amplifiers for interfacing to tip and ring, the microphone amplifier, and other associated functions. For further explanation which is given below, please refer to figure 1 is ever fully on or off. The sum of their gains remains constant (within a nominal error band of dB) at a typical value of - 40 dB (see figure 11). Their purpose is to control the transmit and receive paths to provide the half-duplex operation required in a speakerphone. The attenuators are non-inverting, and have a - 3.0 dB (from max. gain) frequency of approximately 100 kHz. The input impedance of each attenuator (TI and RI) is nominally 10 kW (see figure 3), and to prevent distortion, the input signal should be limited to 350 mVrms. Maximum recommended input signal is independent of the volume control setting. The diode clamp on the inputs limits the input swing, and therefore the maximum negative output swing. This is the reason VRECO and VTOL specification are defined as they are in the electrical characteristics. The output impedance is less than 10 W until the output current limit (typically 2.5 mA) is reached. "0.1 93 7740 e 11 kW RI 21 TI 9 5 kW 95 kW VB to Attenuator Input Figure 3. Attenuator input stage Transmit and Receive Attenuators TI, TO and RI, RECO The attenuators are complementary in function, i.e., when one is at maximum gain (+ 6.0 dB), the other is at maximum attenuation (- 46 dB), and vice versa. Neither The attenuators are controlled by the single output of the control block, which is measurable at the CT pin (Pin 14). When the CT pin is at + 240 mV w. r. t. VB, the circuit is in the receive mode (receive attenuator is at + 6.0 dB). When the CT pin is at - 240 mV w.r.t. VB, the circuit is in the transmit mode (transmit attenuator is at + 6.0 dB). The circuit is in an idle mode when the CT voltage is equal to VB causing the attenuators' gain to be halfway between their fully on and fully off positions (- 20 dB each). Monitoring the CT voltage (w.r.t. VB) is the most direct method of monitoring the circuit's mode. The attenuator control has seven inputs: two from the comparators operated by the level detectors, two from the background noise monitors, volume control, dial-tone detector, and AGC. They are described as follows: 4 (22) Rev. A1, 29-Apr-98 U4082B Level Detectors There are four level detectors, two on the receive side and two on the transmit side. As shown in figure 4, the terms in parentheses form one system, and the other terms form the second system. Each level detector is a high-gain amplifier with back-to-back diodes in the feedback path, resulting in nonlinear gain, which permits operation over a wide dynamic range of speech levels. Refer to the graphs of figures 12, 13 and 14 for their DC and ac transfer characteristics. The sensitivity of each level detector is determined by the external resistor and capacitor at each input (TLI1, TLI2, RLI1, and RLI2). Each output charges an external capacitor through a diode and limiting resistor, thus providing a DC representation of the input ac signal level. The outputs have a quick rise time (determined by the capacitor and an internal 350-W resistor) and a slow decay time set by an internal current source and the capacitor. The capacitors on the four outputs should have the same value ("10%) to prevent timing problems. Referring to figure 2, on the receive side, one level detector (RLI1) is at the receive input receiving the same signal as at tip and ring, and the other (RLI2) is at the output of the speaker amplifier. On the transmit side, one level detector (TLI2) is at the output of the microphone amplifier, while the other (TLI1) is at the hybrid output. Outputs RLO1 and TLO1 feed a comparator. The output of the comparator goes to the attenuator control block. Likewise, outputs RLO2 and TLO2 feed a second comparator which also goes to the attenuator control block. The truth table for the effects of the level detectors is given below in the attenuator control block section. Background Noise Monitors This circuit distinguishes speech (which consists of bursts) from background noise (a relatively constant signal level). There are two background noise monitors - one for the receive path and the other for the transmit path. The receive background noise monitor is operated on by the RLI1-RLO1 level detector, while the transmit background noise monitor is operated on by the TLI2-TLO2 level detector (see figure 4). They monitor the background noise by storing a DC voltage representative of the respective noise levels in capacitors at CPR and CPT. The voltages at these pins have slow rise times (determined by the external RC), but fast decay times. If the signal at RLI1 (or TLI2) changes slowly, the voltage at CPR (or CPT) will remain more positive than the voltage at the non-inverting input of the monitor's output comparator. When speech is present, the voltage on the non-inverting input of the comparator will rise quicker than the voltage at the inverting input (due to the burst characteristic of speech), causing its output to change. This output is sensed by the attenuator control block. Level detector (TLI2) RLI1 (17) 26 5.1 k W 0.1 mF Signal input Level detector 4 mA 350 W 24 TLO1 (RLO2) (19) 2 mF V B - + 350 W (TLO2) RLO1 (18)25 2 mF 4 mA + - Background noise monitor (CPT) CPR VS - + - + 36 mV (16) 100 kW 27 47 mF 56 kW 33 kW 15 V B V B (RLI2) TLI1 (20) 23 5.1 kW 0.1 mF Signal input + - - + C4 (C3) C2 (C1) To attenuator control block Comparator 93 7741 e Figure 4. Level detectors Rev. A1, 29-Apr-98 5 (22) U4082B The 36-mV offset at the comparator's input keeps the comparator from changing state unless the speech level exceeds the background noise by approximately 4.0 dB. The time constant of the external RC (approximately 4.7 seconds) determines the response time to background noise variations. To R attenuator RI 21 - + C4 15 mV VB Figure 5. Dial tone detector 93 7743 e Volume Control The volume control input at VCI (Pin 13) is sensed as a voltage w. r. t. VB. It affects the attenuators only in receive mode and has no effect in idle or transmit modes. In receive mode, the attenuator receive gain, GR, is +6.0 dB, and attenuator transmit gain GT is - 46 dB under the condition that VCI = VB. When VCI < VB, the attenuator receive gain is reduced (figure 15), whereas the attenuator transmit gain is increased, their sum, however, remains constant. Voltage deviation at VCI changes the voltage at CT, which in turn controls the attenuators (see attenuator control block). The volume control setting does not affect the maximum attenuator input signal at which noticeable distortion occurs. The bias current at VCI is typically - 60 nA. It does not vary significantly with the VCI voltage or supply voltage VS. AGC To attenuator control The AGC circuit affects the circuit only in receive mode, and only when the supply voltage is less than 3.5 V. As VS < 3.5 V, the gain of the receive attenuator is reduced according to figure 16. The transmit path attenuation changes such that the sum of the transmit and receive gains remains constant. The purpose of this feature is to reduce the power (and current) used by the speaker when a line-powered speakerphone is connected to a long line where the available power is limited. By reducing the speaker power, the voltage sag at VS is controlled, preventing possible erratic operation. Attenuator Control Block The attenuator control block has seven inputs: Dial Tone Detector The dial tone detector is a comparator with one side connected to the receive input (RI) and the other to VB with a 15 mV offset (see figure 5). If the circuit is in idle mode, and the incoming signal is greater than 15 mV (10 mVrms), the comparator's output will change, disabling the receive idle mode. The receive attenuator will then be at a setting determined mainly by the volume control. This circuit prevents the dial tone (which would be considered as continuous noise) from fading away as the circuit would have the tendency to switch to idle mode. By disabling receive idle mode, the dial tone remains at the normally expected full level. D The output of the comparator operated by RLO2 and TLO2 (microphone/speaker side) - designated C1. D The output of the comparator operated by RLO1 and TLO1 (Tip/Ring side) - designated C2. D The output of the transmit background noise monitor - designated C3. D The output of the receive background noise monitor - designated C4. D The volume control. D The dial tone detector. D The AGC circuit. 6 (22) Rev. A1, 29-Apr-98 U4082B The single output of the control block controls the two attenuators. The effect of C1-C4 is as follows: Inputs C1 T T R R T T R R C2 T R T R T R T R C3 1 Y Y X 0 0 0 X C4 X Y Y 1 X 0 0 0 Output Mode Transmit Fast Idle Fast Idle Receive Slow Idle Slow Idle Slow Idle Slow Idle 3. The circuit will switch to fast idle mode if the level detectors disagree on the relative strengths of the signal levels, and at least one of the background noise monitors indicates speech. For example, referring to the block diagram (figure 2), if there is a sufficient signal at the microphone amp output (TLI2) to override the speaker signal (RLI2) and there is sufficient signal at the receive input (RLI1) to override the signal at the hybrid output (TLI1), and either or both background monitors indicate speech, then the circuit will be in fast idle mode. Two conditions which can cause fast idle mode: a) when both talkers are attempting to gain control of the system by talking at the same time, and b) when one talker is in a very noisy environment, forcing the other talker to continually override that noise level. In general, fast idle mode will occur infrequently. 4. The circuit will switch to slow idle mode when a) both talkers are quiet (no speech present), or b) when one talker's speech level is continuously overridden by noise at the other speaker's location. The time required to switch the circuit between transmit, receive, fast idle and slow idle is determined in part by the components at Pin 14. (See the section on switching times for a more complete explanation of the switching time components.) A diagram of the CT circuitry is shown in figure 6, and operates as follows: X = Don't Care; Y = C3 and C4 are not both 0. Term definitions 1. "Transmit" means the transmit attenuator is fully on (+ 6.0 dB), and the receive attenuator is at maximum attenuation (- 46 dB). 2. "Receive" means both attenuators are controlled by the volume control. At maximum volume, the receive attenuator is fully on (+ 6.0 dB), and the transmit attenuator is at maximum attenuation (- 46 dB). 3. "Fast Idle" means both transmit and receive speech are present in approximately equal levels. The attenuators are quickly switched (30 ms) to idle until one speech level dominates the other. 4. "Slow Idle" means speech has ceased in both transmit and receive paths. The attenuators are then slowly switched (1 second) to idle mode. 5. Switching to full transmit or receive modes from any other mode is at the fast rate ([30 ms). V B 15 RT 14 CT CT - + To attenuators Summary of the truth table 1. The circuit will switch to transmit if a) both transmit level detectors sense higher signal levels relative to the respective receive level detectors (TLI1 versus RLI1, TLI2 versus RLI2), and b) the transmit background noise monitor indicates the presence of speech. 2. The circuit will switch to receive if a) both receive level detectors sense higher signal levels relative to the respective transmit level detectors, and b) the receive background noise monitor indicates the presence of speech. Rev. A1, 29-Apr-98 2 kW I1 I2 60 mA Attenuator control 4 C1 ... C4 Volume control Dial tone detector AGC 93 7744 e Figure 6. CT Attenuator control block circuit 7 (22) U4082B - RT is typically 120 kW, and CT is typically 5.0 mF. - To switch to receive mode, I1 is turned on ( I2 is off ), charging the external capacitor to + 240 mV above VB. ( An internal clamp prevents further charging of the capacitor. ) - To switch to transmit mode, I2 is turned on ( I1 is off ) bringing down the voltage on the capacitor to - 240 mV with respect to VB. - To switch to idle quickly ( fast idle ), the current sources are turned off, and the internal 2-kW resistor is switched on, discharging the capacitor to VB with a time constant of 2 kW CT. - To switch to idle slowly ( slow idle ), the current sources are turned off, the switch at the 2-kW resistor is open, and the capacitor discharges to VB through the external resistor, RT, with a time constant of = RT CT. The muting function (Pin 12), when activated, will reduce the gain of the amplifier to approximately - 39dB (with RMI = 5.1 kW) by shorting the output to the inverting input (see figure 7). The mute input has a threshold of approximately 1.5 V, and the voltage at this pin must be kept within the range of ground and VS (see figure 17). If the mute function is not used, the pin should be grounded. Hybrid Amplifiers The two hybrid amplifiers ( at HTO+, HTO-, and HTI ), in conjunction with an external transformer, provide the two-to-four-wire converter for interfacing to the telephone line. The gain of the first amplifier ( HTI to HTO- ) is set by external resistors ( gain = - RHF/RHI in figure 2 ), and its output drives the second amplifier, the gain of which is internally set at - 1.0. Unlike most op amps, the amplifiers have an all-NPN output stage, which maximizes phase margin and gain bandwidth. This feature ensures stability at gains less than unity, as well as with a wide range of reactive loads. The open-loop gain of the first amplifier is typically 80 dB, and the gain bandwidth of each amplifier is approximately 1.0 MHz (see figure 17). The maximum output swing (p-p) of each amplifier is typically 1.2 V less than VS with an output impedance of < 10 W until current limiting is reached (typically 8.0 mA). The output current capability is guaranteed to be a minimum of 5.0 mA. The bias current at HTI is typically - 30 nA. The connections to the coupling transformer are shown in figure 1. Balancing network is necessary to match the line impedance. Microphone Amplifier The microphone amplifier (Pins 10, 11) has the non-inverting input internally connected to VB, while the inverting input and the output are pinned out. Unlike most op amps, the amplifier has an all-NPN output stage which maximizes phase margin and gain bandwidth. This feature ensures stability at gains less than unity, as well with a wide range of reactive loads. The open loop gain is typically 80 dB (f < 100 Hz), and the gain-bandwidth is typically 1.0 MHz (see figure 17). The maximum p-p output swing is typ. (VS - 1 V) with an output impedance of < 10 W until current limiting is reached (typically 1.5 mA). Input bias current at MIC is typically - 40 nA. Filter The operation of the filter circuit is determined by the external components. The circuit within the U4082B from pins FI to FO is a buffer with a high input impedance ( > 1 MW) and a low output impedance ( < 50 W). The configuration of the external components determines whether the circuit is a high-pass filter (as shown in figure 2), a low-pass filter, or a band-pass filter. As a high-pass filter, with the components shown in figure 8, the filter will keep out the 60-Hz (and 120-Hz) hum which can be picked up by the external telephone lines. RMF R MI From Mike 11 MIC VS 12 MUTE 93 7745 e VS VB + - 10 MICO 90 kW 75 kW Figure 7. Microphone amplifier and mute As a low-pass filter (figure 9), it can be used to roll off the high-end frequencies in the receive circuit, which aids in protecting against acoustic feedback problems. With an appropriate choice of an input coupling capacitor to the low-pass filter, a band-pass filter is formed. 8 (22) Rev. A1, 29-Apr-98 U4082B VB R1 VS 56 kW 220 kW C1 4700 pF 4700 pF C2 R2 2 FI 260 mA 1 FO R1 VI 300 kW VB 220 k W C1 0.01 mF R2 13 kW 0.001 mF 13 k W FI 2 C2 +1 1 FO 0 -3.0 50 305 Hz 0 -3.0 4.0 20 kHz 1 + 2p C for C + C fN 1 2 2 1 R1 R2 1 + 2p C for R + R fN 1 2 93 7747 e 1 1 C2 R2 -30 fN Figure 8. High-pass filter -30 fN Figure 9. Low-pass filter 93 7748 e Power Supply, VB, and Chip Disable The power supply voltage at Pin 4 ( VS ) is between 3.5 and 6.5 V for normal operation, but reduced operation is possible down to 2.8 V (see figure 16 and the AGC section). The power supply current is shown in figure 19 for both power-up and power-down mode. The output voltage at VB ( Pin 15 ) is approx. ( VS - 0.7 )/2, and provides the ac ground for the system. The output impedance at VB is approximately 400 W ( see figure 20 ), and in conjunction with the external capacitor at VB, forms a low-pass filter for power supply rejection. Figure 21 gives an indication of the amount of rejection with different capacitors. The capacitor value depends on whether the circuit is powered by the telephone line or a power supply. Since VB biases the microphone and hybrid amplifiers, the amount of supply rejection at their outputs is directly related to the rejection at VB, as well as their respective gains. Figure 22 depicts this graphically. The chip disable (Pin 3) permits powering down the IC to conserve power and/or for muting purposes. With CD < 0.8 volts, normal operation is in effect. With CD > 2.0 volts and < VS, the IC is powered down. In powered-down mode, the microphone and the hybrid amplifiers are disabled, and their outputs reach high-impedance state. Additionally, the bias is removed from the level detectors. The bias is not removed from the filter (Pins 1 and 2), the attenuators (Pins 8, 9, 21 and 22), or from Pins 13, 14, and 15 (the attenuators are disabled, however, and will not pass a signal). The input impedance at CD is typically 90 kW, has a threshold of approximately 1.5 V, and the voltage at this pin must be kept within the range of ground and VS (see figure 18). If CD is not used, the pin should be grounded. Rev. A1, 29-Apr-98 9 (22) U4082B Absolute Maximum Ratings Reference point Pin 28, Tamb = 25C, unless otherwise specified. Parameters Supply voltage Voltages Pin 4 Pin 3, 12 Pin 13 Pin 2, 9, 21 Symbol VS Value - 1.0 to + 7.0 - 1.0 to (VS + 1.0) - 1.0 to (VS + 0.5) - 0.5 to (VS + 0.5) - 55 to + 150 125 - 20 to + 60 1.3 520 50 120 Unit V V C C C W mW K/W K/W Storage temperature range Junction temperature Ambient temperature range Power dissipation Tamb = 60C Maximum thermal resistance Junction ambient Tstg Tj Tamb DIP28 SO28 DIP28 SO28 Ptot Ptot RthJA RthJA Operation Recommendation Parameters Supply voltage CD input MUTE input Output current Volume control input Attenuator input signal voltage Microphone amplifier, hybrid amplifier gain Load current Test Conditions / Pins Pin 4 Pin 3 Pin 12 Pin 15 Pin 13 Pins 9, 21 Symbol VS Min. 3.5 0 - 0.3 VB 0 0 @ RECO, TO Pins 8, 22 @ MICO Pin 10 @ HTO-, HTO + Pins 6, 5 Ambient temperature range Tamb 0 0 0 Typ. - - - - - - - - - Max. 6.5 VS 500 VB 350 40 Unit V V IB VCI mA V mVrms dB "2.0 "1.0 "5.0 +60 mA -20 - C 10 (22) Rev. A1, 29-Apr-98 U4082B Electrical Characteristics Tamb = + 25C, VS = 5.0 V, CD Parameters Power supply Supply current CD input resistance CD input voltage Output voltage Output resistance Power supply rejection ratio Attenuators Receive attenuator gain v 0.8 V, unless otherwise specified Test Conditions / Pins Symbol IS RCD VCDH VCDL VB ROVB PSRR 50.0 2.0 0.0 1.8 Min. Typ. 5.5 600.0 90.0 Max. 8.0 800.0 VS 0.8 1.3 2.1 400.0 54.0 2.4 Unit mA VS = 6.5 V, CD = 0.8 V VS = 6.5 V, CD = 2.0 V VS = VCD = 6.5 V - High - Low VS = 3.5 V VS = 5.0 V IVB = 1 mA CVB = 220 mF, f = 1 kHz mA kW V V W dB Gain change AGC gain change Idle mode Range R to T mode Volume control range RECO DC voltage RECO DC voltage RECO high voltage RECO low voltage RI input resistance Transmit attenuator gain f = 1.0 kHz, VCI = VB R mode, RI = 150 mVrms (VS = 5.0 V) (VS = 3.5 V) VS = 3.5 V versus VS = 5.0 V -VS = 2.8 V versus VS = 5.0 V RI = 150 mVrms R Mode, 0.3 VB < VCI < VB R mode R to T mode IO = - 1 mA RI = VB + 1.5 V IO = 1 mA, RI = VB -1 V, output measured w. r. t. VB RI < 350 mVrms f = 1 kHz T mode, TI = 150 mVrms Idle mode, TI = 150 mVrms Range T to R mode T Mode T to R Mode IO = - 1.0 mA TI = VB + 1.5 V IO = + 1.0 mA TI = VB - 1.0 V, output measured w. r. t. VB TI < 350 mVrms GR + GT, @ T, Idle, R GR +4.0 - 0.5 +6.0 0.0 -25.0 +8.0 +0.5 -15.0 - 17.0 54.0 dB DGR1 DGR2 DGR3 VCR GRI - 22.0 49.0 27.0 - 20.0 52.0 35.0 VB dB dB V mV V V kW DVRECO VRECOH VRECOL RRI GT GTI GTI VTO VTO VTOH VTOL 7.0 +4.0 - 22.0 49.0 3.7 VRECO "10 "150.0 - 1.5 10.0 +6.0 - 20.0 52.0 VB - 1.0 14.0 +8.0 - 17.0 54.0 dB V mV V V TO DC voltage TO DC voltage TO high voltage TO low voltage "100 "150.0 3.7 - 1.5 - 1.0 TI input resistance Gain tracking RTI GTR 7.0 "0.1 10.0 14.0 kW dB Rev. A1, 29-Apr-98 11 (22) U4082B Electrical Characteristics (continued) Tamb = +25C, VS = 5.0 V, CD Parameters Attenuator control CT voltage v 0.8 V, unless otherwise specified Test Conditions / Pins Symbol VCT +240.0 0.0 - 240.0 - 60.0 +60.0 0.0 2.0 - 60.0 15.0 0.0 80.0 1.0 200.0 - 40.0 - 55.0 50.0 2.0 0.0 - 68.0 90.0 VS 0.8 0.15 - 20.0 - 30.0 60.0 - 0.35 3.7 250.0 3.7 450.0 0.3 0.0 0.0 80.0 1.0 0.0 - 30.0 +20.0 +30.0 mV - 40.0 +85.0 3.6 Min. Typ. Max. Unit CT source current CT sink current CT slow idle current CT fast idle internal resistance VCI input current Dial tone detector threshold Microphone amplifier VMUTE < 0.8 V, GVCL = 31dB Output offset VMICO - VB, Feedback R = 180 kW Open loop gain f < 100 Hz Gain bandwidth Output high voltage IO= - 1.0 mA, VS = 5.0 V Output low voltage IO = + 1.0 mA Input bias current (MIC) Muting (D gain) f = 1 kHz, VMUTE = 2.0 V 300 Hz < f < 10 kHz MUTE input resistance VS = VMUTE = 6.5 V MUTE input high MUTE input low Distortion 300 Hz < f < 10 kHz Hybrid amplifiers HTO-Offset VHTO-VB, Feedback R = 51 kW HTO to HTO+ Offset Feedback R = 51 kW Open loop gain HTI to HTO-, f < 100 Hz Gain bandwidth Closed loop gain HTO- to HTO+ Input bias current @ HTI HTO high voltage IO = - 5.0 mA HTO low voltage IO = + 5.0 mA HTO+ high voltage IO = - 5.0 mA HTO+ low voltage IO = + 5.0 mA Distortion 300 Hz < f < 10 kHz, (see figure 10) Pin 14 - VB R mode, VCI = VB Idle mode T mode R mode T mode ICTR ICTT ICTS RFI IVCI VDT MICO VOS GVOLM GBWM VMICOH VMICOL IBM G G RMUTE VMUTEH VMUTEL THDM HVOS HBVOS GVOLH GB GVCLH IBH VHT H VHT L VHT H VHT L d - 85.0 +40.0 1.5 mA mA mA kW nA mV mV dB MHz V mV nA dB dB kW V V % mV mV dB MHz dB nA V mV V mV % 10.0 - 50.0 70.0 3.7 20.0 +50.0 +0.35 12 (22) Rev. A1, 29-Apr-98 U4082B Electrical Characteristics (continued) Tamb = + 25C, VS = 5.0 V, CD v 0.8 V, unless otherwise specified Symbol ITH Min. 0.8 Typ. 1.0 Max. 1.2 Unit Parameters Test Conditions / Pins Level detectors and background noise monitors Transmit receive switching Current ratio from T to R threshold at RLI1 + RLI2 to 20 mA at TLI1 + TLI2 to switch RLO1, RLO2, TLO1, TLO2 Source current RLO1, RLO2, TLO1, TLO2 Sink current CPR, CPT output resistance IO = 1.2 mA CPR, CPT leakage current Filter Voltage offset at FO VFO - VB, 220 kW from VB to FI FO sink current FI bias current System distortion R Mode from FI to RECO, FO connected to RI T Mode from MIC to HTO-/HTO+, includes T attenuator ILSO ILSK RCP ICPLK FOVOS IFO IFI dR dT - 200.0 150.0 - 2.0 4.0 35 - 0.2 - 90 260 - 50.0 0.5 0.8 0.0 400.0 mA mA W mA mV mA nA % % 3.0 3.0 10 k W VI 51 k W 7 0.1 mF HTI VB - + 6 HTO- R - + VB R 5 Analyzer HTO+ 1200 W Amplifier 93 7739 e Figure 10. Hybrid amplifier distortion test Temperature Characteristics Parameter Supply current, CD = 0.8 V IS Supply current, CD = 2.0 V IS VB output voltage, VS = 5.0 V VO Attenuator gain (max. gain) Attenuator gain (max. attenuation) Attenuator input resistance (@ TI, RI) Dial tone detector threshold CT source, sink current Microphone, hybrid amplifier offset Transmit receive switching threshold Sink current at RLO1, RLO2, TLO1, TLO2 Closed loop gain (HTO- to HTO+) Typical Value @ 25C 5.0 mA 400.0 mA 2.1 V +6.0 dB - 46.0 dB 10.0 kW 15.0 mV Typical Change -20 to +60C - 0.3%/C - 0.4%/C +0.8%/C 0.0008 dB/C 0.004 dB/C +0.6%/C +20.0 mV/C - 0.15%/C "60.0 mA 0.0 mV 1.0 4.0 mA 0.0 dB - 10.0 nA/C 0.001%/C "4.0 mV/C "0.02%/C Rev. A1, 29-Apr-98 13 (22) U4082B 10 0 - 10 G (dB) - 20 - 30 - 40 - 50 - 320 93 7767 e 20 10 DVO (mV @ 1 kHz) T attenuator R attenuator 0 - 10 - 20 - 30 - 40 vi = 10 mV vi = 40 mV - 160 0 160 VCT - VB (mV) 320 100 93 7770 e 1000 f (Hz) 10000 Figure 11. Attenuator gain versus VCT (Pin 14) Figure 14. Level detector AC transfer characteristics versus frequency 10 0 - 10 500 400 DVO (mV) 300 DG (dB) 200 - 20 Receive mode 100 - 30 Minimum recommended level 0 0 93 7768 e - 20 - 40 - 60 II (mA) - 80 - 100 - 40 0.1 93 7771 e 0.3 0.5 0.7 0.9 1.2 VCI/VB Figure 12. Level detector DC transfer characteristics 300 250 200 Figure 15. Receive attenuator versus volume control 10 R = 5.1 kW C = 0.1 mF R = 10 kW C = 0.047 mF or 0.1 mF f = 1 kHz 0 DVO(mV) 150 100 50 0 DG (dB) 80 100 - 10 - 20 - 30 0 20 4 60 - 40 2.8 93 7772 e 3 3.2 VS (V) 3.4 3.6 93 7769 e Vi (mVrms) Figure 13. Level detector AC transfer characteristics Figure 16. Receive attenuation gain versus VS 14 (22) Rev. A1, 29-Apr-98 U4082B 120 100 G VOL(dB) 80 60 40 20 0 0.1 93 7773 e 120 100 Microphone phase Gain amp. Hybrid phase amp. 60 40 20 0 1 10 f (kHz) 100 1000 80 Phase (degrees) 2.5 2 3 Figure 17. Microphone-and 1st hybrid amplifier open-loop gain and phase versus frequency 120 100 80 60 40 20 0 0 93 7774 e 3.0 Valid for 0 v CD, MUTE v VS V (V) B 2.5 2.0 1.5 1.0 0.5 0 0 93 7776 e VS = 6 V II (mA) VS = 3.5 V 2 4 Input Voltage (V) 6 6.5 8 0.5 1.0 1.5 2.0 - IB (mA) (Load Current) Figure 18. Input characteristics @ CD, MUTE 10 Figure 20. VB output characteristics 80 CVB = 1000 mF 8 CDv 0.8V 6 I S (mA) PSRR (dB) 60 500 mF 200 mF 100 mF 50 mF 40 4 2 2VvCDvVS 0 0 93 7775 e 2 4 VS (V) 6 8 93 7778 e 20 0.3 1 f (kHz) Figure 19. Supply current versus supply voltage Figure 21. VB power supply rejection versus frequency characteristics and VB capacitor Rev. A1, 29-Apr-98 15 (22) U4082B Design Guidelines Switching Time The switching time of the U4082B circuit is determined by CT (Pin 14, refer to figure 5), and secondarily by the capacitors at the level detector outputs (RLO1, RLO2, TLO1, TLO2). See figure 2. The time to switch from idle to receive or transmit mode is determined by the capacitor at CT, together with the internal current sources. The switching time is: Switching time is determined by the internal current source as described above. The above switching times occur, however, after the level detectors have detected the appropriate signal levels, since their outputs operate the attenuator control block. Referring to figure 4, the rise time of the level detectors' outputs to new speech is quick by comparison (approximately 1 ms), determined by the internal 350-W resistor and the external capacitor (typically 2 mF). The output's decay time is determined by the external capacitor and an internal 4-mA current source, giving a decay rate of 60 ms for a 120-mV excursion at RLO or TLO. Total response time of the circuit is not constant since it depends on the relative strength of the signals at the different level detectors and the timing of the signals with respect to each other. The capacitors at the four outputs (RLO1, RLO2, TLO1, TLO2) must be equal of value ( to prevent problems in timing and level response. nT + nV I where CT + 24060 5 + 20.0 ms nV CT I = 240 mV = 5 mF = 60 mA "10%) If the circuit switches directly from receive to transmit mode (or vice versa), the total switching time would be 40 ms. The switching time depends upon the mode selection. If the circuit is going to "fast idle", the time constant is determined by the CT capacitor, and the internal 2-kW resistor. With CT = 5 mF, the time constant is approximately 10 ms, giving a switching time to idle of approximately 30 ms (for 95 % change). Fast idle is an infrequent mode, however, occurring when both speakers are talking and competing for control of the circuit. The switching time from idle back to either transmit or receive mode is described above. By switching to "slow idle," the time constant is determined by the CT capacitor and RT, the external resistor (see figure 6). With CT = 5.0 mF and RT = 120 kW, the time constant is approximately 600 ms, giving a switching time of approximately 1.8 seconds (for 95% change). The switching period to slow idle begins when both speakers have stopped talking. The switching time back to the original mode will depend on how soon that speaker begins speaking again. The sooner the speaking starts during the 1.8-s period, the quicker the switching time since a smaller voltage excursion is required. The rise time of the level detector's outputs is not significant since it is so short. The decay time, however, provides a significant part of the "hold time" necessary to hold the circuit during the normal pauses in speech. The components at the inputs of the level detectors (RLI1, RLI2, TLI1, TLI2) do not affect the switching time but rather affect the relative signal levels required to switch the circuit and the frequency response of the detectors. Design Equations The following definitions are used at 1 kHz with reference to figure 2 and figure 24 where coupling capacitors are omitted for the sake of simplicity: - GMA is the gain of the microphone amplifier measured from the microphone output to TI (typically 35 V/V, or 31 dB); - GT is the gain of the transmit attenuator, measured from TI to TO; - GHA is the gain of hybrid amplifiers, measured from TO to the HTO-/HTO+ differential output (typically 10.2 V/V, or 20.1 dB); - GHT is the gain from HTO-/HTO+ to Tip/Ring for transmit signals, and includes the balance network (measured at 0.4 V/V, or - 8 dB); 16 (22) Rev. A1, 29-Apr-98 U4082B 100 HTO -, CVB = 1000 mF 80 = 220 mF PSRR (dB) 60 MICO, CVB = 1000 mF 6 5 4 3 2 TO MICO HTO -, HTO + TO, RO FO 40 20 = 220 mF V OPP (V) 1 0 RO 0 0.3 93 7777 e 1 f (kHz) 2 3 93 7779 e 3 4 5 VS (V) 6 Figure 22. VB power supply rejection of the microphone and hybrid amplifiers Figure 23. Typical output swing versus VS MIC amp. MICO I1 TLI2 Acoustic coupling - + + - RLI2 I3 R3 R1 TI T attenuator TO Hybrid amp. HTO-/HTO+ R2 - + GST + - RLI1 R4 I4 FI Filter Hybrid Ring GHR I2 TLI1 GHIT Tip Comparator C1 Comparator C2 Attenuator control R attenuator SAO 93 7749 e RECO Speaker amp. RI FO Figure 24. Basic block diagram for design purposes - GST is the sidetone gain, measured from HTO-/HTO+ to the filter input (measured at 0.18 V/V, or -15 dB); - GHR is the gain from Tip/Ring to the filter input for receive signals (measured at 0.833 V/V or -1.6 dB); - GFO is the gain of the filter stage, measured from the input of the filter to RI, typically 0 dB; - GR is the gain of the receive attenuator measured from RI to RECO; - GSA is the gain of the speaker amplifier, measured from RECO to the differential output of the U4083B (typically 22 V/V or 26.8 dB); - GAC is the acoustic coupling, measured from the speaker differential voltage to the microphone output voltage. Rev. A1, 29-Apr-98 17 (22) U4082B I) Transmit gain The transmit gain, from the microphone output ( VM ) to Tip and Ring, is determined by the output characteristics of the microphone, and the desired transmit level. For example, a typical electret microphone will produce approximately 0.35 mVrms under normal speech conditions. To achieve 100 mVrms at Tip/Ring, an overall gain of 285 V/V is necessary. The gain of the transmit attenuator is fixed at 2.0 (+ 6.0 dB), and the gain through the hybrid of figure 2 (GHT) is nominally 0.4 (- 8.0 dB). Therefore, a gain of 357 V/V is required of the microphone and hybrid amplifiers. It is desirable to have the majority of that gain in the microphone amplifier for three reasons: 1. the low-level signals from the microphone should be amplified as soon as possible to minimize signal/noise problems; 2. to provide a reasonable signal level to the TLI2 level detector; and 3. to minimize any gain applied to broadband noise generated within the attenuator. However, to cover the normal voiceband, the microphone amplifier's gain should not exceed 48 dB (see figure 17). For the circuit in figure 24, the gain of the microphone amplifier was set at 35 V/V (31 dB), and the differential gain of the hybrid amplifiers was set at 10.2 V/V (20.1 dB). gain is unity, and the receive attenuator's gain is 2.0 V/V (+ 6.0 dB) at maximum volume. The speaker amplifier's gain is set at 22 V/V (26.8 dB) which puts the overall gain at approximately 31.2 dB. III) Loop gain The total loop gain (of figure 24) must add up to less than 0 dB to obtain a stable circuit. This can be expressed as: GMA + GT + GHA + GST + GFO + GR + GSA + GAC < 0 (2) Using the typical numbers mentioned above, and knowing that GT + GR = - 40 dB, the required acoustic coupling can be determined: GAC <-[31 + 20.1 + (- 15) + 0 + (- 40) + 26.8] = - 22.9 dB. (3) An acoustic loss of at least 23 dB is necessary to prevent instability and oscillations, commonly referred to as "singing". However, the following equations show that greater acoustic loss is necessary to obtain proper level detection and switching. IV) Switching thresholds To switch comparator C1, currents I1 and I3 need to be determined. Referring to figure 24, with a receive signal VL applied to Tip/Ring, a current I3 will flow through R3 into RLI2 according to the following equation: I3 II) Receive gain The overall receive gain depends on the incoming signal level and the desired output power at the speaker. Nominal receive levels (independent of the peaks) at Tip/Ring can be 35 mVrms (- 27 dBm), although on long lines that level can be down to 8.0 mVrms (- 40 dBm). The speaker power is: P SPK +V R L 3 G HR G FO GR G SA 2 (4) + 10 where the terms in the brackets are the V/V gain terms. The speaker amplifier gain is divided by two since GSA is the differential gain of the amplifier, and V3 is obtained from one side of that output. The current I1, coming from the microphone circuit, is defined by: I1 dBm 10 0.6 RS (1) +V M G MA R1 (5) where RS is the speaker impedance, and the dBm term is the incoming signal level increased by the gain of the receive path. Experience has shown that approximately 30 dB gain is a satisfactory amount for the majority of applications. Using the above numbers and equation 1, it would appear that the resulting power to the speaker is extremely low. However, equation 1 does not consider the peaks in normal speech which can be 10 to 15 times the rms value. Considering the peaks, the overall average power approaches 20 to 30 mW on long lines, and much more on short lines. Referring to figure 2, the gain from Tip/Ring to the filter input was measured at 0.833 V/V (- 1.6 dB), the filter's where VM is the microphone voltage. Since the switching threshold occurs when I1 = I3, combining the above two equations yields: VM +V L R1 R3 [G HR G FO G MA GR 2 G SA] (6) This is the general equation defining the microphone voltage necessary to switch comparator C1 when a receive signal VL is present. The highest VM occurs when the receive attenuator is at maximum gain (+ 6.0 dB). Using the typical numbers for equation 6 yields: VM = 0.52 VL (7) 18 (22) Rev. A1, 29-Apr-98 U4082B To switch comparator C2, currents I2 and I4 need to be determined. With sound applied to the microphone, a voltage VM is created by the microphone, resulting in a current I2 into TLI1: VM MR MI G MA GT 2 I2 +V R M G HA 2 (8) MT Since GHA is the differential gain of the hybrid amplifiers, it is divided by two to obtain the voltage V2 applied to R2. Comparator C2 switches when I4 = I2. I4 is defined by: 93 7750 e VL Figure 25. Switching thresholds I4 + VL [G HR R4 G FO] (9) Some comments on the graph (figure 25): D Acoustic coupling and sidetone coupling were not included in equations 7 and 12. Those couplings will affect the actual performance of the final speakerphone due to their interaction with speech at the microphone and the receive signal coming in at Tip/Ring. The effects of those couplings are difficult to predict due to their associated phase shifts and frequency response. In some cases the coupling signal will add, and other times subtract from the incoming signal. The physical design of the speakerphone enclosure, as well as the specific phone line to which it is connected, will affect the acoustic and sidetone couplings, respectively. Setting I4 = I2, and combining the above equations results in: VL +V M R4 R2 [G MA [G HR G T G HA] G FO 2] (10) This equation defines the line voltage at Tip/Ring necessary to switch comparator C2 in the presence of a microphone voltage. The highest VL occurs when the circuit is in transmit mode (GT = + 6.0 dB). Using the typical numbers for equation 10 yields: VL = 840 VM (or VM = 0.0019 VL) (11) D The MR line helps define the maximum acoustic coupling allowed in a system, which can be found from the following equation: G AC(MAX) +2 R1 R 3 G MA (13) At idle, where the gain of the two attenuators is -20 dB (0.1 V/V), equations 6 and 10 yield the same result: VM = 0.024 VL (12) Equation 13 is independent of the volume control setting. Conversely, the acoustic coupling of a designed system helps determine the minimum slope of that line. Using the component values of figure 2 in equation 13 yields a GAC(MAX) of - 37 dB. Experience has shown, however, that an acoustic coupling loss of 40 dB is desirable. Equations 7, 11, and 12 define the thresholds for switching, and are represented in figure 25 The "M" terms are the slopes of the lines (0.52, 0.024, and 0.0019) which are the coefficients of the three equations. The MR line represents the receive to transmit threshold, in that it defines the microphone signal level necessary to switch to transmit in the presence of a given receive signal level. The MT line represents the transmit to receive threshold. The MI line represents the idle condition, and defines the threshold level on one side (transmit or receive) necessary to overcome noise on the other. D The MT line helps define the maximum sidetone coupling (GST) allowed in the system. GST can be found using the following equation: G ST +2 R4 R 2 G FO (14) Using the component values of figure 2 in equation 14 yields a maximum sidetone of 0 dB. Experience has shown, however, that a minimum of 6.0 dB loss is preferable. The above equations can be used to determine the resistor values for the level detector inputs. Equation 6 can be Rev. A1, 29-Apr-98 19 (22) U4082B used to determine the R1, R3 ratio, and equation 10 can be used to determine the R1-R2 ratio. In figure 24, R1-R4 each represent the combined impedance of the resistor and coupling capacitor at each level detector input. The magnitude of each RC's impedance should be kept within the range of 2.0 kW to 15 kW in the voiceband (due to the typical signal levels present) to obtain the best performance from the level detectors. The specific R and C at each location will determine the frequency response of that level detector. monitor, thereby indicating the "presence of speech" to the attenuator control block. Grounding CPT does the same for the transmit path. Additionally, the receive background noise monitor is automatically disabled by the dial tone detector whenever the receive signal exceeds the detector's threshold. Transmit/Receive Detection Priority Although the U4082B was designed to have idle mode such that the attenuators are halfway between their full on and full off positions, idle mode can be biased towards the transmit or the receive side. With this done, gaining control of the circuit from idle will be easier for that side towards which it is biased since that path will have less attenuation at idle. By connecting a resistor from CT (Pin 14) to ground, the circuit will be biased towards the transmit side. The resistor value is calculated from: R Application Information Dial Tone Detector The threshold for the dial tone detector is internally set at 15 mV (10 mVrms) below VB (see figure 5). That threshold can be reduced by connecting a resistor from RI to ground. The resistor value is calculated from: R + 10 k DV VB -1 where VB is the voltage at Pin 15, and DV is the amount of threshold reduction. By connecting a resistor from VS to RI, the threshold can be increased. The resistor value is calculated from: R +R T D VB -1 V where RT = 120 kW (typ.) connected between Pin 14 and 15. DV= VB - V14 (see figure 11). By connecting a resistor from CT (Pin 14) to VS, the circuit will be biased towards the receive side. The resistor value is calculated from: R + 10 k VS - VB DV -1 where DV is the amount of the threshold increase. Background Noise Monitors For testing or circuit analysis purposes, the transmit or receive attenuators can be set to "on" position by disabling the background noise monitors and applying a signal so as to activate the level detectors. Grounding the CPR pin will disable the receive background noise +R T VS - VB DV -1 Switching time will be somewhat affected in each case due to the different voltage excursions required to get to transmit and receive from idle. For practical considerations, the DV shift should not exceed 100 mV. 20 (22) Rev. A1, 29-Apr-98 U4082B Package Information Package DIP28 Dimensions in mm 37.40 36.90 15.29 15.19 4.0 3.8 0.8 0.5 3.3 0.58 0.48 0.35 0.25 13.9 13.7 1.54 33.02 28 2.54 16.1 15.3 15 technical drawings according to DIN specifications 13023 1 14 9.15 8.65 7.5 7.3 Package SO28 Dimensions in mm 18.05 17.80 2.35 0.4 1.27 28 16.51 15 0.25 0.10 0.25 10.50 10.20 technical drawings according to DIN specifications 1 14 13033 Rev. A1, 29-Apr-98 21 (22) U4082B Ozone Depleting Substances Policy Statement It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 22 (22) Rev. A1, 29-Apr-98 |
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